(1) Field of the Invention
The present invention relates to a method for controlling readout or write-in of a semiconductor memory device and an apparatus for the same.
(2) Description of the Prior Art
The characteristics, for example, working velocity, of a semiconductor memory device, especially a random access memory (RAM), depend on the selection pattern since the memory cells are selected at random in such a device.
Therefore, during a pre-shipment test, various selection patterns are used for testing, the characteristics of a RAM. Each cell of the memory cell array is directly selected by a corresponding address command. For example, if a plurality of cells a, b, c d and e are to be selected, the selection pattern may be "a.fwdarw.b.fwdarw.c.fwdarw.d.fwdarw.e", "a.fwdarw.b.fwdarw.e.fwdarw.c.fwdarw.d.fwdarw.e", etc. Such differences in the patterns by which the memory cells are selected result in different characteristics of the semiconductor memory device.
In the prior art, compliance with the required working characteristics of all the selection patterns has to be confirmed by testing all the selection patterns, thus requiring an extremely long testing time.